1. Field of the Invention
The present invention relates to a multi-threshold complementary metal oxide silicon (MTCMOS) circuit. More particularly, the present invention relates to a MTCMOS system and methods for controlling respective blocks.
2. Description of the Related Art
With increased integration of semiconductor devices, demand for low power consumption has also increased. One method of implementing a low power integrated circuit (IC) includes reducing the power supply voltage. However, reducing the power supply voltage reduces the speed of transistors in the IC. Thus, the threshold voltage Vth of the transistors may be reduced. However, reducing the Vth may increase the leakage current of the transistors, which increases power consumption when the device is in a standby state. This can be of particular importance in devices having a high standby-to-active ratio, e.g., mobile or portable devices, in which leakage current may be the dominant factor in determining overall battery life.
One solution involves using a multi-threshold CMOS (MTCMOS) system, which uses both high and low Vth transistors. More particularly, the MTCMOS system uses low Vth transistors to implement gates at high speed and high Vth transistors to form virtual gates and suppress the leakage current when the device is in a standby mode. In other words, the low Vth transistors are used for logic operations and the high Vth transistors are used to supply power and/or ground voltages.
In an active mode, the high Vth transistors are turned on to supply the power voltage to the logic gates, allowing the low Vth transistors to operate at high speed. In a standby mode, the high Vth transistors are turned off to cut off the low Vth transistors, thereby reducing or eliminating the leakage current through the low Vth transistors.
FIG. 1 illustrates a block diagram of a conventional MTCMOS system 100. The MTCMOS system 100 includes a system power manager 10, an MTCMOS controller 20 and an MTCMOS design area 30. The MTCMOS design area 30 includes a plurality of blocks 30-i. Each block 30-i includes a flip/flop (F/F) 32, a logic block 34, a MOS switch 36 and a function block 38. The MOS switch 36 has a higher Vth than the logic block 34. The F/F 32 and the logic block 34 are connected between a power source (VDD) and a virtual ground (VGND). The MOS switch 36 is connected between a ground voltage (GND) and VGND.
In an active mode, the MOS switch 36 is turned on to supply VDD or GND to the logic block 34. In a standby mode, the MOS switch 36 is turned off to interrupt VDD and/or GND to the logic block 34, thereby reducing a leakage current of the logic block 34 and minimizing power consumption of the system.
When the system enters the standby mode, the power manager 10 sends STOP and do not send CLOCK signals to the MTCMOS controller 20 and the MTCMOS design area 30, respectively. In response to the STOP signal, the MTCMOS controller 20 outputs a control signal SC for controlling the MOS switch 36 and a control signal SCB (inverted SC) for controlling the F/F 32. When VDD is cut off, the voltage level of VGND floats. To prevent loss of data stored in the logic block 34, the data is stored in the F/F 32 in response to SCB before turning off the MOS switch 36 in response to SC.
In many systems, e.g., mobile systems, typically only some functions are activated, while the rest remain deactivated. However, the conventional MTCMOS system only enters standby mode when the entire system is not operated. Thus, the conventional MTCMOS cannot control individual blocks and cannot reduce power consumption when only certain blocks need to be activated.